aurig-fpga/aurig-lint

VHDL lint engine and CLI for the AURIG FPGA tooling stack — configurable rules (naming, library policy, synthesizability, documentation); text, JSON, Markdown, and HTML reports.

0 stars 1 forks 0 watchers Tcl Apache License 2.0

code-quality eda fpga hardware-designs hdl linter rtl tcl vhdl

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1 Open Issue Need Help Last updated: Sep 18, 2026

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Test suite leaves a temporary directory behind 29 days ago

good first issue

aurig-fpga/aurig-lint

VHDL lint engine and CLI for the AURIG FPGA tooling stack — configurable rules (naming, library policy, synthesizability, documentation); text, JSON, Markdown, and HTML reports.

Tcl

#code-quality#eda#fpga#hardware-designs#hdl#linter#rtl#tcl#vhdl