Xilinx/mlir-aie

IRON JIT: support 1-overlay / N-sequence designs — separable insts/overlay compilation, parameterized (emitC) sequences, and a cache model that decouples them about 16 hours ago

enhancement good first issue help wanted iron-python

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

[AIE1] NpuDmaMemcpyNdOp::verify skips all dimension checks on AIE1 8 days ago

bug help wanted dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

remove magic register offsets from tests 10 days ago

help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Cleanup sleep() calls in unit tests 10 days ago

good first issue help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

AIEFindFlows can report a packet flow exists even when the packet rules route the flow incorrectly 10 days ago

bug help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

scf.for with iter_args crashes objectFifo loop unrolling 10 days ago

bug help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Improve Vector->AIEVec lowering strategy for arith.addi/addf/muli/mulf 10 days ago

enhancement help wanted aievec

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Chess issue with absolute path `link_with` | `_include _file` 10 days ago

bug help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Failing Assertion in ObjectFifoStatefulTransformPass::unrollForLoops 10 days ago

bug help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Improve type constraints for aievec:mul_elem and Co. 10 days ago

help wanted quality aievec

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

ObjectFifo: "aie.use_lock" op can only access a lock in the same tile 10 days ago

enhancement help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Compose shimDMAAllocationOps with ObjectFifoStatefulTransform 10 days ago

enhancement help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Port PR #807 from iree-amd-aie 10 days ago

help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Remove unnecessary custom printers and parsers from AIEVec ops 10 days ago

good first issue help wanted quality aievec

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Enabling trace for matmul single_core causes intermittent functional failure when run 10 days ago

bug help wanted tracing

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Potential issue with aiex.npu.dma_memcpy_nd lowering 10 days ago

bug help wanted dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Use Peano to build mlir-aie from source 10 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Unexpected `qds_device::wait()` error when computation latency is long 10 days ago

bug help wanted question

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

build_drivers.sh needs error handling 10 days ago

good first issue help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Add trace overrun check so invalid trace capture is flagged and reported during trace generation 10 days ago

enhancement help wanted quality tracing

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Issue with aiex.npu.dma_memcpy_nd 10 days ago

bug help wanted dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Support for objectfifos with large depth 10 days ago

enhancement help wanted quality objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

JIT hashing fails to detect changes in headers 10 days ago

bug help wanted iron-python

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Implement a MNIST with an MLP Guide Example 10 days ago

enhancement good first issue help wanted application-development

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Missing and Wrong Data Layout Transformation Checks 10 days ago

bug help wanted dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Add option to align buffers with the vector length 10 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Runtime Library with TXN address patching to enable >5 buffer objects 10 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Extend ObjectFifo packet-switched lowering to Mem tiles 10 days ago

enhancement help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Enable packing multiple ObjectFifos into packet-switched flows 10 days ago

enhancement help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Connectivity graph leads to invalid connections that are flagged as an error 10 days ago

bug help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Initialization of buffers in neighboring tiles causes link error when compiling with CHESS 10 days ago

bug help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Lock acquire/release requirement in BD configuration is too strict 10 days ago

bug help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Packet header modification from within tile kernel code 10 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

mobilenet v3 example design improvements 10 days ago

enhancement good first issue help wanted quality application-development

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

i8 vector arith.muli and arith.maxsi fail to lower on AIE2P 10 days ago

bug help wanted aievec

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Mode-2 tracing (execution/inst_exec) has major documentation gaps 10 days ago

enhancement help wanted tracing

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

ObjectFIFO Feature Analysis & New Proposed Features 10 days ago

enhancement help wanted objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Embed cpp code blocks in IRON python designs 10 days ago

enhancement good first issue help wanted iron-python

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

[ci] Nightly Mobilenet SA Placer Test 10 days ago

help wanted quality ci

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Port AIEVec e2e tests to Peano/LLVM IR backend 10 days ago

good first issue help wanted quality aievec

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Full-ELF + Tracing Test 10 days ago

enhancement help wanted tracing

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Inlining external functions 10 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

GitHub repo size/content management 10 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Test suite for mixing dataflow abstractions 10 days ago

enhancement help wanted quality objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Asymmetric Tile Buffering Examples with Peano 10 days ago

enhancement good first issue help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

[RFC][Help Wanted] IRON Programming Skills 10 days ago

enhancement good first issue help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Align `amd/IRON` and `Xilinx/mlir-aie` for transforms/operator bases 10 days ago

enhancement good first issue help wanted quality iron-python

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

`lit` configuration should configure `clang++`, not `clang` 10 days ago

bug help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

docs: mkdocs site build test for PRs in CI 10 days ago

bug enhancement help wanted ci

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

JIT Strengthening -- PR #3235 Follow-up ideas 11 days ago

help wanted quality needs more 👀 (eyes) iron-python

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

[AIEX] verify-runtime-rearm is over-conservative: misses locks re-armed inside aie.core 12 days ago

help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

ObjectFifo configuration/argument handling 17 days ago

enhancement help wanted quality needs more 👀 (eyes) objectfifo

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

AIE/AIEX Dialect Organization 17 days ago

enhancement help wanted needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

create-pathfinder-flows is sensitive to aie.flow ordering 17 days ago

bug help wanted quality needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Expose DMA BD field widths on AIETargetModel instead of hardcoding per-tile-type 17 days ago

enhancement good first issue needs more 👀 (eyes) dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

[documentation] HostRuntime Python Documentation on Website 17 days ago

documentation enhancement help wanted quality

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Check that finite length fields in buffer descriptors are validated for each tile type. 22 days ago

good first issue help wanted quality needs more 👀 (eyes) dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Feature Request: Large dma_bd operand decomposition 22 days ago

enhancement help wanted quality needs more 👀 (eyes) dma-programming

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Trace infrastructure improvement ideas 22 days ago

enhancement help wanted needs more 👀 (eyes) tracing

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

SA placer improvement suggestions 22 days ago

enhancement help wanted needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Alternative way of indicating Tracing on ComputeTile's Memory Bank 22 days ago

bug help wanted needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Feature to detect insufficient stack size 22 days ago

enhancement help wanted quality needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Feature request: Enable token_issue feature on MT 22 days ago

enhancement help wanted quality needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Support for fast dynamic dispatch 22 days ago

enhancement help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Clean up/refactor 22 days ago

help wanted quality needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Add "antenna detector" to --aie-find-flows 22 days ago

enhancement good first issue help wanted

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Unify C++ translations for aie and aievec about 2 months ago

good first issue quality UI/UX

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Add prepush hooks for formatting 4 months ago

enhancement good first issue

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Improvements to JIT workflow 6 months ago

enhancement help wanted needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Port Reuse and Data Merge from ST to CT 10 months ago

help wanted needs more 👀 (eyes)

Xilinx/mlir-aie

666

An MLIR-based toolchain for AMD AI Engine-enabled devices.

C

#iron#llvm#mlir#npu#python

Open Issues Need Help